1. Field of the Invention
The present invention relates to digital processing, for example processing employing but not limited to multimedia processors, single instruction multiple data (SIMD) processors, digital signal processors with SIMD (Vector) processing capability, or similar devices, and more particularly, to vector register files used in digital processing to temporarily store inputs and outputs of computations.
2. Description of the Related Art
Single instruction multiple data (SIMD) processing is a powerful architectural concept having wide acceptance for computations involving media data or digital signal processing algorithms. It permits a single instruction to specify the computation on one or more streams of data values arranged as one dimensional vectors. Data are specified for the computation as coming from memory or from a register file typically holding vectors in one dimensional sequential order. Elements of the vector are accessed for the computation either sequentially (i.e., element 1, 2, 3 . . . ) or by stride (i.e., a fixed increment). However, many algorithms require irregular access to vector elements, either because of table-lookup like algorithms or because the elements require some address permutation, such as bit reversal. Typically, accesses of this type are performed one element at a time to form a new vector in the file which is then accessed sequentially. The performance of an algorithm which must be implemented in this manner is much less than would be possible for true SIMD processing.
Therefore, a need exists for a vector register architecture which permits all these modes of operation in the same structure to optimize performance.